VEditor Wiki
Welcome to the VEditor Wiki
Eclipse VEditor provides [http://www.verilog.com/ Verilog (IEEE-1364)] and VHDL language specific features on [http://www.eclipse.org/ Eclipse IDE]. It helps coding and debugging in hardware development based on Verilog or VHDL. [http://sourceforge.net/projects/veditor/ Here] is the project summary page in SourceForge. Eclipse Verilog Editor is tested on Eclipse 3.2.1.
Screen Shots
Here, you will find some sample screen shots.
Features
Here, you will find what you can do with VEditor.
How-To's
Here, you will find documentation on how to use VEditor.
Developer Topics
Here, you will find documentation and discussion regarding the development and building of VEditor
FAQ
Here, you will find answers to Frequently Asked Questions
Future plan
- preference page of code formatter
- lint tool
- wave form view - Signals are selected from source code view
Report and comment
Please send bug report, support request and other comment to [http://sourceforge.net/projects/veditor/ the project summary page] in SourceForge.
Author
Eclipse VEditor is written by tadashi-k@users.sourceforge.net and other [http://sourceforge.net/project/memberlist.php?group_id=103963 developers].
License
Eclipse Verilog editor 0.5.0 and later versions are distributed under [http://www.eclipse.org/legal/epl-v10.html Eclipse Public License v 1.0.]
The earlier versions than 0.5.0 were distributed under [http://www.gnu.org/licenses/gpl.html GNU General Public License]. They are still available now.